| /* | |
| * Analogue & Micro ASP8347 Device Tree Source | |
| * | |
| * Copyright 2008 Codehermit | |
| * | |
| * This program is free software; you can redistribute it and/or modify it | |
| * under the terms of the GNU General Public License as published by the | |
| * Free Software Foundation; either version 2 of the License, or (at your | |
| * option) any later version. | |
| */ | |
| /dts-v1/; | |
| / { | |
| model = "Analogue & Micro ASP8347E"; | |
| compatible = "analogue-and-micro,asp8347e"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| aliases { | |
| ethernet0 = &enet0; | |
| ethernet1 = &enet1; | |
| serial0 = &serial0; | |
| serial1 = &serial1; | |
| }; | |
| cpus { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| PowerPC,8347@0 { | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| d-cache-line-size = <32>; | |
| i-cache-line-size = <32>; | |
| d-cache-size = <32768>; | |
| i-cache-size = <32768>; | |
| timebase-frequency = <0>; // from bootloader | |
| bus-frequency = <0>; // from bootloader | |
| clock-frequency = <0>; // from bootloader | |
| }; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x00000000 0x8000000>; // 128MB at 0 | |
| }; | |
| localbus@ff005000 { | |
| #address-cells = <2>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8347e-localbus", | |
| "fsl,pq2pro-localbus", | |
| "simple-bus"; | |
| reg = <0xff005000 0x1000>; | |
| interrupts = <77 0x8>; | |
| interrupt-parent = <&ipic>; | |
| ranges = < | |
| 0 0 0xf0000000 0x02000000 | |
| >; | |
| flash@0,0 { | |
| compatible = "cfi-flash"; | |
| reg = <0 0 0x02000000>; | |
| bank-width = <2>; | |
| device-width = <2>; | |
| }; | |
| }; | |
| soc8349@ff000000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| device_type = "soc"; | |
| ranges = <0x0 0xff000000 0x00100000>; | |
| reg = <0xff000000 0x00000200>; | |
| bus-frequency = <0>; | |
| wdt@200 { | |
| device_type = "watchdog"; | |
| compatible = "mpc83xx_wdt"; | |
| reg = <0x200 0x100>; | |
| }; | |
| i2c@3000 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <0>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3000 0x100>; | |
| interrupts = <14 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| rtc@68 { | |
| compatible = "dallas,ds1374"; | |
| reg = <0x68>; | |
| }; | |
| }; | |
| i2c@3100 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <1>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3100 0x100>; | |
| interrupts = <15 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| }; | |
| spi@7000 { | |
| cell-index = <0>; | |
| compatible = "fsl,spi"; | |
| reg = <0x7000 0x1000>; | |
| interrupts = <16 0x8>; | |
| interrupt-parent = <&ipic>; | |
| mode = "cpu"; | |
| }; | |
| dma@82a8 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8347-dma", "fsl,elo-dma"; | |
| reg = <0x82a8 4>; | |
| ranges = <0 0x8100 0x1a8>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| cell-index = <0>; | |
| dma-channel@0 { | |
| compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0 0x80>; | |
| cell-index = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x80 0x80>; | |
| cell-index = <1>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x100 0x80>; | |
| cell-index = <2>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x180 0x28>; | |
| cell-index = <3>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| }; | |
| /* phy type (ULPI or SERIAL) are only types supported for MPH */ | |
| /* port = 0 or 1 */ | |
| usb@22000 { | |
| compatible = "fsl-usb2-mph"; | |
| reg = <0x22000 0x1000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <39 0x8>; | |
| phy_type = "ulpi"; | |
| port0; | |
| }; | |
| /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | |
| usb@23000 { | |
| compatible = "fsl-usb2-dr"; | |
| reg = <0x23000 0x1000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <38 0x8>; | |
| dr_mode = "otg"; | |
| phy_type = "ulpi"; | |
| }; | |
| enet0: ethernet@24000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <0>; | |
| device_type = "network"; | |
| model = "TSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x24000 0x1000>; | |
| ranges = <0x0 0x24000 0x1000>; | |
| local-mac-address = [ 00 08 e5 11 32 33 ]; | |
| interrupts = <32 0x8 33 0x8 34 0x8>; | |
| interrupt-parent = <&ipic>; | |
| tbi-handle = <&tbi0>; | |
| phy-handle = <&phy0>; | |
| linux,network-index = <0>; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-mdio"; | |
| reg = <0x520 0x20>; | |
| phy0: ethernet-phy@0 { | |
| interrupt-parent = <&ipic>; | |
| interrupts = <17 0x8>; | |
| reg = <0x1>; | |
| }; | |
| phy1: ethernet-phy@1 { | |
| interrupt-parent = <&ipic>; | |
| interrupts = <18 0x8>; | |
| reg = <0x2>; | |
| }; | |
| tbi0: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| enet1: ethernet@25000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <1>; | |
| device_type = "network"; | |
| model = "TSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x25000 0x1000>; | |
| ranges = <0x0 0x25000 0x1000>; | |
| local-mac-address = [ 00 08 e5 11 32 34 ]; | |
| interrupts = <35 0x8 36 0x8 37 0x8>; | |
| interrupt-parent = <&ipic>; | |
| tbi-handle = <&tbi1>; | |
| phy-handle = <&phy1>; | |
| linux,network-index = <1>; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-tbi"; | |
| reg = <0x520 0x20>; | |
| tbi1: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| serial0: serial@4500 { | |
| cell-index = <0>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4500 0x100>; | |
| clock-frequency = <400000000>; | |
| interrupts = <9 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| serial1: serial@4600 { | |
| cell-index = <1>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4600 0x100>; | |
| clock-frequency = <400000000>; | |
| interrupts = <10 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| /* May need to remove if on a part without crypto engine */ | |
| crypto@30000 { | |
| device_type = "crypto"; | |
| model = "SEC2"; | |
| compatible = "talitos"; | |
| reg = <0x30000 0x10000>; | |
| interrupts = <11 0x8>; | |
| interrupt-parent = <&ipic>; | |
| num-channels = <4>; | |
| channel-fifo-len = <24>; | |
| exec-units-mask = <0x0000007e>; | |
| /* desc mask is for rev2.0, | |
| * we need runtime fixup for >2.0 */ | |
| descriptor-types-mask = <0x01010ebf>; | |
| }; | |
| /* IPIC | |
| * interrupts cell = <intr #, sense> | |
| * sense values match linux IORESOURCE_IRQ_* defines: | |
| * sense == 8: Level, low assertion | |
| * sense == 2: Edge, high-to-low change | |
| */ | |
| ipic: pic@700 { | |
| interrupt-controller; | |
| #address-cells = <0>; | |
| #interrupt-cells = <2>; | |
| reg = <0x700 0x100>; | |
| device_type = "ipic"; | |
| }; | |
| }; | |
| chosen { | |
| bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; | |
| stdout-path = &serial0; | |
| }; | |
| }; |