| /* | |
| * MPC8378E MDS Device Tree Source | |
| * | |
| * Copyright 2007 Freescale Semiconductor Inc. | |
| * | |
| * This program is free software; you can redistribute it and/or modify it | |
| * under the terms of the GNU General Public License as published by the | |
| * Free Software Foundation; either version 2 of the License, or (at your | |
| * option) any later version. | |
| */ | |
| /dts-v1/; | |
| / { | |
| model = "fsl,mpc8378emds"; | |
| compatible = "fsl,mpc8378emds","fsl,mpc837xmds"; | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| aliases { | |
| ethernet0 = &enet0; | |
| ethernet1 = &enet1; | |
| serial0 = &serial0; | |
| serial1 = &serial1; | |
| pci0 = &pci0; | |
| pci1 = &pci1; | |
| pci2 = &pci2; | |
| }; | |
| cpus { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| PowerPC,8378@0 { | |
| device_type = "cpu"; | |
| reg = <0x0>; | |
| d-cache-line-size = <32>; | |
| i-cache-line-size = <32>; | |
| d-cache-size = <32768>; | |
| i-cache-size = <32768>; | |
| timebase-frequency = <0>; | |
| bus-frequency = <0>; | |
| clock-frequency = <0>; | |
| }; | |
| }; | |
| memory { | |
| device_type = "memory"; | |
| reg = <0x00000000 0x20000000>; // 512MB at 0 | |
| }; | |
| localbus@e0005000 { | |
| #address-cells = <2>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8378-elbc", "fsl,elbc", "simple-bus"; | |
| reg = <0xe0005000 0x1000>; | |
| interrupts = <77 0x8>; | |
| interrupt-parent = <&ipic>; | |
| // booting from NOR flash | |
| ranges = <0 0x0 0xfe000000 0x02000000 | |
| 1 0x0 0xf8000000 0x00008000 | |
| 3 0x0 0xe0600000 0x00008000>; | |
| flash@0,0 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "cfi-flash"; | |
| reg = <0 0x0 0x2000000>; | |
| bank-width = <2>; | |
| device-width = <1>; | |
| u-boot@0 { | |
| reg = <0x0 0x100000>; | |
| read-only; | |
| }; | |
| fs@100000 { | |
| reg = <0x100000 0x800000>; | |
| }; | |
| kernel@1d00000 { | |
| reg = <0x1d00000 0x200000>; | |
| }; | |
| dtb@1f00000 { | |
| reg = <0x1f00000 0x100000>; | |
| }; | |
| }; | |
| bcsr@1,0 { | |
| reg = <1 0x0 0x8000>; | |
| compatible = "fsl,mpc837xmds-bcsr"; | |
| }; | |
| nand@3,0 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8378-fcm-nand", | |
| "fsl,elbc-fcm-nand"; | |
| reg = <3 0x0 0x8000>; | |
| u-boot@0 { | |
| reg = <0x0 0x100000>; | |
| read-only; | |
| }; | |
| kernel@100000 { | |
| reg = <0x100000 0x300000>; | |
| }; | |
| fs@400000 { | |
| reg = <0x400000 0x1c00000>; | |
| }; | |
| }; | |
| }; | |
| soc@e0000000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| device_type = "soc"; | |
| compatible = "simple-bus"; | |
| ranges = <0x0 0xe0000000 0x00100000>; | |
| reg = <0xe0000000 0x00000200>; | |
| bus-frequency = <0>; | |
| wdt@200 { | |
| compatible = "mpc83xx_wdt"; | |
| reg = <0x200 0x100>; | |
| }; | |
| sleep-nexus { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "simple-bus"; | |
| sleep = <&pmc 0x0c000000>; | |
| ranges; | |
| i2c@3000 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <0>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3000 0x100>; | |
| interrupts = <14 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| rtc@68 { | |
| compatible = "dallas,ds1374"; | |
| reg = <0x68>; | |
| interrupts = <19 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| }; | |
| sdhci@2e000 { | |
| compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; | |
| reg = <0x2e000 0x1000>; | |
| interrupts = <42 0x8>; | |
| interrupt-parent = <&ipic>; | |
| sdhci,wp-inverted; | |
| /* Filled in by U-Boot */ | |
| clock-frequency = <0>; | |
| }; | |
| }; | |
| i2c@3100 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| cell-index = <1>; | |
| compatible = "fsl-i2c"; | |
| reg = <0x3100 0x100>; | |
| interrupts = <15 0x8>; | |
| interrupt-parent = <&ipic>; | |
| dfsrr; | |
| }; | |
| spi@7000 { | |
| cell-index = <0>; | |
| compatible = "fsl,spi"; | |
| reg = <0x7000 0x1000>; | |
| interrupts = <16 0x8>; | |
| interrupt-parent = <&ipic>; | |
| mode = "cpu"; | |
| }; | |
| dma@82a8 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; | |
| reg = <0x82a8 4>; | |
| ranges = <0 0x8100 0x1a8>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| cell-index = <0>; | |
| dma-channel@0 { | |
| compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0 0x80>; | |
| cell-index = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@80 { | |
| compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x80 0x80>; | |
| cell-index = <1>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@100 { | |
| compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x100 0x80>; | |
| cell-index = <2>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| dma-channel@180 { | |
| compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | |
| reg = <0x180 0x28>; | |
| cell-index = <3>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <71 8>; | |
| }; | |
| }; | |
| usb@23000 { | |
| compatible = "fsl-usb2-dr"; | |
| reg = <0x23000 0x1000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <38 0x8>; | |
| dr_mode = "host"; | |
| phy_type = "ulpi"; | |
| sleep = <&pmc 0x00c00000>; | |
| }; | |
| enet0: ethernet@24000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <0>; | |
| device_type = "network"; | |
| model = "eTSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x24000 0x1000>; | |
| ranges = <0x0 0x24000 0x1000>; | |
| local-mac-address = [ 00 00 00 00 00 00 ]; | |
| interrupts = <32 0x8 33 0x8 34 0x8>; | |
| phy-connection-type = "mii"; | |
| interrupt-parent = <&ipic>; | |
| tbi-handle = <&tbi0>; | |
| phy-handle = <&phy2>; | |
| sleep = <&pmc 0xc0000000>; | |
| fsl,magic-packet; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-mdio"; | |
| reg = <0x520 0x20>; | |
| phy2: ethernet-phy@2 { | |
| interrupt-parent = <&ipic>; | |
| interrupts = <17 0x8>; | |
| reg = <0x2>; | |
| }; | |
| phy3: ethernet-phy@3 { | |
| interrupt-parent = <&ipic>; | |
| interrupts = <18 0x8>; | |
| reg = <0x3>; | |
| }; | |
| tbi0: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| enet1: ethernet@25000 { | |
| #address-cells = <1>; | |
| #size-cells = <1>; | |
| cell-index = <1>; | |
| device_type = "network"; | |
| model = "eTSEC"; | |
| compatible = "gianfar"; | |
| reg = <0x25000 0x1000>; | |
| ranges = <0x0 0x25000 0x1000>; | |
| local-mac-address = [ 00 00 00 00 00 00 ]; | |
| interrupts = <35 0x8 36 0x8 37 0x8>; | |
| phy-connection-type = "mii"; | |
| interrupt-parent = <&ipic>; | |
| tbi-handle = <&tbi1>; | |
| phy-handle = <&phy3>; | |
| sleep = <&pmc 0x30000000>; | |
| fsl,magic-packet; | |
| mdio@520 { | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| compatible = "fsl,gianfar-tbi"; | |
| reg = <0x520 0x20>; | |
| tbi1: tbi-phy@11 { | |
| reg = <0x11>; | |
| device_type = "tbi-phy"; | |
| }; | |
| }; | |
| }; | |
| serial0: serial@4500 { | |
| cell-index = <0>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4500 0x100>; | |
| clock-frequency = <0>; | |
| interrupts = <9 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| serial1: serial@4600 { | |
| cell-index = <1>; | |
| device_type = "serial"; | |
| compatible = "fsl,ns16550", "ns16550"; | |
| reg = <0x4600 0x100>; | |
| clock-frequency = <0>; | |
| interrupts = <10 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| crypto@30000 { | |
| compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2", | |
| "fsl,sec2.1", "fsl,sec2.0"; | |
| reg = <0x30000 0x10000>; | |
| interrupts = <11 0x8>; | |
| interrupt-parent = <&ipic>; | |
| fsl,num-channels = <4>; | |
| fsl,channel-fifo-len = <24>; | |
| fsl,exec-units-mask = <0x9fe>; | |
| fsl,descriptor-types-mask = <0x3ab0ebf>; | |
| sleep = <&pmc 0x03000000>; | |
| }; | |
| /* IPIC | |
| * interrupts cell = <intr #, sense> | |
| * sense values match linux IORESOURCE_IRQ_* defines: | |
| * sense == 8: Level, low assertion | |
| * sense == 2: Edge, high-to-low change | |
| */ | |
| ipic: pic@700 { | |
| compatible = "fsl,ipic"; | |
| interrupt-controller; | |
| #address-cells = <0>; | |
| #interrupt-cells = <2>; | |
| reg = <0x700 0x100>; | |
| }; | |
| pmc: power@b00 { | |
| compatible = "fsl,mpc8378-pmc", "fsl,mpc8349-pmc"; | |
| reg = <0xb00 0x100 0xa00 0x100>; | |
| interrupts = <80 0x8>; | |
| interrupt-parent = <&ipic>; | |
| }; | |
| }; | |
| pci0: pci@e0008500 { | |
| interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | |
| interrupt-map = < | |
| /* IDSEL 0x11 */ | |
| 0x8800 0x0 0x0 0x1 &ipic 20 0x8 | |
| 0x8800 0x0 0x0 0x2 &ipic 21 0x8 | |
| 0x8800 0x0 0x0 0x3 &ipic 22 0x8 | |
| 0x8800 0x0 0x0 0x4 &ipic 23 0x8 | |
| /* IDSEL 0x12 */ | |
| 0x9000 0x0 0x0 0x1 &ipic 22 0x8 | |
| 0x9000 0x0 0x0 0x2 &ipic 23 0x8 | |
| 0x9000 0x0 0x0 0x3 &ipic 20 0x8 | |
| 0x9000 0x0 0x0 0x4 &ipic 21 0x8 | |
| /* IDSEL 0x13 */ | |
| 0x9800 0x0 0x0 0x1 &ipic 23 0x8 | |
| 0x9800 0x0 0x0 0x2 &ipic 20 0x8 | |
| 0x9800 0x0 0x0 0x3 &ipic 21 0x8 | |
| 0x9800 0x0 0x0 0x4 &ipic 22 0x8 | |
| /* IDSEL 0x15 */ | |
| 0xa800 0x0 0x0 0x1 &ipic 20 0x8 | |
| 0xa800 0x0 0x0 0x2 &ipic 21 0x8 | |
| 0xa800 0x0 0x0 0x3 &ipic 22 0x8 | |
| 0xa800 0x0 0x0 0x4 &ipic 23 0x8 | |
| /* IDSEL 0x16 */ | |
| 0xb000 0x0 0x0 0x1 &ipic 23 0x8 | |
| 0xb000 0x0 0x0 0x2 &ipic 20 0x8 | |
| 0xb000 0x0 0x0 0x3 &ipic 21 0x8 | |
| 0xb000 0x0 0x0 0x4 &ipic 22 0x8 | |
| /* IDSEL 0x17 */ | |
| 0xb800 0x0 0x0 0x1 &ipic 22 0x8 | |
| 0xb800 0x0 0x0 0x2 &ipic 23 0x8 | |
| 0xb800 0x0 0x0 0x3 &ipic 20 0x8 | |
| 0xb800 0x0 0x0 0x4 &ipic 21 0x8 | |
| /* IDSEL 0x18 */ | |
| 0xc000 0x0 0x0 0x1 &ipic 21 0x8 | |
| 0xc000 0x0 0x0 0x2 &ipic 22 0x8 | |
| 0xc000 0x0 0x0 0x3 &ipic 23 0x8 | |
| 0xc000 0x0 0x0 0x4 &ipic 20 0x8>; | |
| interrupt-parent = <&ipic>; | |
| interrupts = <66 0x8>; | |
| bus-range = <0x0 0x0>; | |
| ranges = <0x02000000 0x0 0x90000000 0x90000000 0x0 0x10000000 | |
| 0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | |
| 0x01000000 0x0 0x00000000 0xe0300000 0x0 0x00100000>; | |
| clock-frequency = <0>; | |
| sleep = <&pmc 0x00010000>; | |
| #interrupt-cells = <1>; | |
| #size-cells = <2>; | |
| #address-cells = <3>; | |
| reg = <0xe0008500 0x100 /* internal registers */ | |
| 0xe0008300 0x8>; /* config space access registers */ | |
| compatible = "fsl,mpc8349-pci"; | |
| device_type = "pci"; | |
| }; | |
| pci1: pcie@e0009000 { | |
| #address-cells = <3>; | |
| #size-cells = <2>; | |
| #interrupt-cells = <1>; | |
| device_type = "pci"; | |
| compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | |
| reg = <0xe0009000 0x00001000>; | |
| ranges = <0x02000000 0 0xa8000000 0xa8000000 0 0x10000000 | |
| 0x01000000 0 0x00000000 0xb8000000 0 0x00800000>; | |
| bus-range = <0 255>; | |
| interrupt-map-mask = <0xf800 0 0 7>; | |
| interrupt-map = <0 0 0 1 &ipic 1 8 | |
| 0 0 0 2 &ipic 1 8 | |
| 0 0 0 3 &ipic 1 8 | |
| 0 0 0 4 &ipic 1 8>; | |
| sleep = <&pmc 0x00300000>; | |
| clock-frequency = <0>; | |
| pcie@0 { | |
| #address-cells = <3>; | |
| #size-cells = <2>; | |
| device_type = "pci"; | |
| reg = <0 0 0 0 0>; | |
| ranges = <0x02000000 0 0xa8000000 | |
| 0x02000000 0 0xa8000000 | |
| 0 0x10000000 | |
| 0x01000000 0 0x00000000 | |
| 0x01000000 0 0x00000000 | |
| 0 0x00800000>; | |
| }; | |
| }; | |
| pci2: pcie@e000a000 { | |
| #address-cells = <3>; | |
| #size-cells = <2>; | |
| #interrupt-cells = <1>; | |
| device_type = "pci"; | |
| compatible = "fsl,mpc8378-pcie", "fsl,mpc8314-pcie"; | |
| reg = <0xe000a000 0x00001000>; | |
| ranges = <0x02000000 0 0xc8000000 0xc8000000 0 0x10000000 | |
| 0x01000000 0 0x00000000 0xd8000000 0 0x00800000>; | |
| bus-range = <0 255>; | |
| interrupt-map-mask = <0xf800 0 0 7>; | |
| interrupt-map = <0 0 0 1 &ipic 2 8 | |
| 0 0 0 2 &ipic 2 8 | |
| 0 0 0 3 &ipic 2 8 | |
| 0 0 0 4 &ipic 2 8>; | |
| sleep = <&pmc 0x000c0000>; | |
| clock-frequency = <0>; | |
| pcie@0 { | |
| #address-cells = <3>; | |
| #size-cells = <2>; | |
| device_type = "pci"; | |
| reg = <0 0 0 0 0>; | |
| ranges = <0x02000000 0 0xc8000000 | |
| 0x02000000 0 0xc8000000 | |
| 0 0x10000000 | |
| 0x01000000 0 0x00000000 | |
| 0x01000000 0 0x00000000 | |
| 0 0x00800000>; | |
| }; | |
| }; | |
| }; |