| * Amlogic Meson8, Meson8b and Meson8m2 Clock and Reset Unit |
| |
| The Amlogic Meson8 / Meson8b / Meson8m2 clock controller generates and |
| supplies clock to various controllers within the SoC. |
| |
| Required Properties: |
| |
| - compatible: must be one of: |
| - "amlogic,meson8-clkc" for Meson8 (S802) SoCs |
| - "amlogic,meson8b-clkc" for Meson8 (S805) SoCs |
| - "amlogic,meson8m2-clkc" for Meson8m2 (S812) SoCs |
| - reg: it must be composed by two tuples: |
| 0) physical base address of the xtal register and length of memory |
| mapped region. |
| 1) physical base address of the clock controller and length of memory |
| mapped region. |
| |
| - #clock-cells: should be 1. |
| - #reset-cells: should be 1. |
| |
| Each clock is assigned an identifier and client nodes can use this identifier |
| to specify the clock which they consume. All available clocks are defined as |
| preprocessor macros in the dt-bindings/clock/meson8b-clkc.h header and can be |
| used in device tree sources. |
| |
| Similarly a preprocessor macro for each reset line is defined in |
| dt-bindings/reset/amlogic,meson8b-clkc-reset.h (which can be used from the |
| device tree sources). |
| |
| |
| Example: Clock controller node: |
| |
| clkc: clock-controller@c1104000 { |
| compatible = "amlogic,meson8b-clkc"; |
| reg = <0xc1108000 0x4>, <0xc1104000 0x460>; |
| #clock-cells = <1>; |
| #reset-cells = <1>; |
| }; |
| |
| |
| Example: UART controller node that consumes the clock generated by the clock |
| controller: |
| |
| uart_AO: serial@c81004c0 { |
| compatible = "amlogic,meson-uart"; |
| reg = <0xc81004c0 0x14>; |
| interrupts = <0 90 1>; |
| clocks = <&clkc CLKID_CLK81>; |
| }; |