| /* | |
| * Device Tree Source for am3517 SoC | |
| * | |
| * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/ | |
| * | |
| * This file is licensed under the terms of the GNU General Public License | |
| * version 2. This program is licensed "as is" without any warranty of any | |
| * kind, whether express or implied. | |
| */ | |
| #include "omap3.dtsi" | |
| / { | |
| aliases { | |
| serial3 = &uart4; | |
| can = &hecc; | |
| }; | |
| ocp@68000000 { | |
| am35x_otg_hs: am35x_otg_hs@5c040000 { | |
| compatible = "ti,omap3-musb"; | |
| ti,hwmods = "am35x_otg_hs"; | |
| status = "disabled"; | |
| reg = <0x5c040000 0x1000>; | |
| interrupts = <71>; | |
| interrupt-names = "mc"; | |
| }; | |
| davinci_emac: ethernet@0x5c000000 { | |
| compatible = "ti,am3517-emac"; | |
| ti,hwmods = "davinci_emac"; | |
| status = "disabled"; | |
| reg = <0x5c000000 0x30000>; | |
| interrupts = <67 68 69 70>; | |
| syscon = <&scm_conf>; | |
| ti,davinci-ctrl-reg-offset = <0x10000>; | |
| ti,davinci-ctrl-mod-reg-offset = <0>; | |
| ti,davinci-ctrl-ram-offset = <0x20000>; | |
| ti,davinci-ctrl-ram-size = <0x2000>; | |
| ti,davinci-rmii-en = /bits/ 8 <1>; | |
| local-mac-address = [ 00 00 00 00 00 00 ]; | |
| }; | |
| davinci_mdio: ethernet@0x5c030000 { | |
| compatible = "ti,davinci_mdio"; | |
| ti,hwmods = "davinci_mdio"; | |
| status = "disabled"; | |
| reg = <0x5c030000 0x1000>; | |
| bus_freq = <1000000>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| }; | |
| uart4: serial@4809e000 { | |
| compatible = "ti,omap3-uart"; | |
| ti,hwmods = "uart4"; | |
| status = "disabled"; | |
| reg = <0x4809e000 0x400>; | |
| interrupts = <84>; | |
| dmas = <&sdma 55 &sdma 54>; | |
| dma-names = "tx", "rx"; | |
| clock-frequency = <48000000>; | |
| }; | |
| omap3_pmx_core2: pinmux@480025d8 { | |
| compatible = "ti,omap3-padconf", "pinctrl-single"; | |
| reg = <0x480025d8 0x24>; | |
| #address-cells = <1>; | |
| #size-cells = <0>; | |
| #pinctrl-cells = <1>; | |
| #interrupt-cells = <1>; | |
| interrupt-controller; | |
| pinctrl-single,register-width = <16>; | |
| pinctrl-single,function-mask = <0xff1f>; | |
| }; | |
| hecc: can@5c050000 { | |
| compatible = "ti,am3517-hecc"; | |
| status = "disabled"; | |
| reg = <0x5c050000 0x80>, | |
| <0x5c053000 0x180>, | |
| <0x5c052000 0x200>; | |
| reg-names = "hecc", "hecc-ram", "mbx"; | |
| interrupts = <24>; | |
| clocks = <&hecc_ck>; | |
| }; | |
| }; | |
| }; | |
| /* Table Table 5-79 of the TRM shows 480ab000 is reserved */ | |
| &usb_otg_hs { | |
| status = "disabled"; | |
| }; | |
| &iva { | |
| status = "disabled"; | |
| }; | |
| &mailbox { | |
| status = "disabled"; | |
| }; | |
| &mmu_isp { | |
| status = "disabled"; | |
| }; | |
| &smartreflex_mpu_iva { | |
| status = "disabled"; | |
| }; | |
| /include/ "am35xx-clocks.dtsi" | |
| /include/ "omap36xx-am35xx-omap3430es2plus-clocks.dtsi" |