| # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: Aspeed SMC controllers |
| |
| maintainers: |
| - Chin-Ting Kuo <chin-ting_kuo@aspeedtech.com> |
| - Cédric Le Goater <clg@kaod.org> |
| |
| description: | |
| This binding describes the Aspeed Static Memory Controllers (FMC and |
| SPI) of the AST2400, AST2500 and AST2600 SOCs. |
| |
| allOf: |
| - $ref: spi-controller.yaml# |
| |
| properties: |
| compatible: |
| enum: |
| - aspeed,ast2600-fmc |
| - aspeed,ast2600-spi |
| - aspeed,ast2500-fmc |
| - aspeed,ast2500-spi |
| - aspeed,ast2400-fmc |
| - aspeed,ast2400-spi |
| |
| reg: |
| items: |
| - description: registers |
| - description: memory mapping |
| |
| clocks: |
| maxItems: 1 |
| |
| interrupts: |
| maxItems: 1 |
| |
| required: |
| - compatible |
| - reg |
| - clocks |
| |
| unevaluatedProperties: false |
| |
| examples: |
| - | |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h> |
| #include <dt-bindings/clock/ast2600-clock.h> |
| |
| spi@1e620000 { |
| reg = <0x1e620000 0xc4>, <0x20000000 0x10000000>; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| compatible = "aspeed,ast2600-fmc"; |
| clocks = <&syscon ASPEED_CLK_AHB>; |
| interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; |
| |
| flash@0 { |
| reg = < 0 >; |
| compatible = "jedec,spi-nor"; |
| spi-max-frequency = <50000000>; |
| spi-rx-bus-width = <2>; |
| }; |
| |
| flash@1 { |
| reg = < 1 >; |
| compatible = "jedec,spi-nor"; |
| spi-max-frequency = <50000000>; |
| spi-rx-bus-width = <2>; |
| }; |
| |
| flash@2 { |
| reg = < 2 >; |
| compatible = "jedec,spi-nor"; |
| spi-max-frequency = <50000000>; |
| spi-rx-bus-width = <2>; |
| }; |
| }; |
