| # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause |
| %YAML 1.2 |
| --- |
| $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# |
| $schema: http://devicetree.org/meta-schemas/core.yaml# |
| |
| title: NVIDIA Tegra210 XUSB pad controller |
| |
| maintainers: |
| - Thierry Reding <thierry.reding@gmail.com> |
| - Jon Hunter <jonathanh@nvidia.com> |
| |
| description: | |
| The Tegra XUSB pad controller manages a set of I/O lanes (with differential |
| signals) which connect directly to pins/pads on the SoC package. Each lane |
| is controlled by a HW block referred to as a "pad" in the Tegra hardware |
| documentation. Each such "pad" may control either one or multiple lanes, |
| and thus contains any logic common to all its lanes. Each lane can be |
| separately configured and powered up. |
| |
| Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or |
| super-speed USB. Other lanes are for various types of low-speed, full-speed |
| or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller |
| contains a software-configurable mux that sits between the I/O controller |
| ports (e.g. PCIe) and the lanes. |
| |
| In addition to per-lane configuration, USB 3.0 ports may require additional |
| settings on a per-board basis. |
| |
| Pads will be represented as children of the top-level XUSB pad controller |
| device tree node. Each lane exposed by the pad will be represented by its |
| own subnode and can be referenced by users of the lane using the standard |
| PHY bindings, as described by the phy-bindings.txt file in this directory. |
| |
| The Tegra hardware documentation refers to the connection between the XUSB |
| pad controller and the XUSB controller as "ports". This is confusing since |
| "port" is typically used to denote the physical USB receptacle. The device |
| tree binding in this document uses the term "port" to refer to the logical |
| abstraction of the signals that are routed to a USB receptacle (i.e. a PHY |
| for the USB signal, the VBUS power supply, the USB 2.0 companion port for |
| USB 3.0 receptacles, ...). |
| |
| properties: |
| compatible: |
| const: nvidia,tegra210-xusb-padctl |
| |
| reg: |
| maxItems: 1 |
| |
| resets: |
| items: |
| - description: pad controller reset |
| |
| interrupts: |
| items: |
| - description: XUSB pad controller interrupt |
| |
| reset-names: |
| items: |
| - const: padctl |
| |
| avdd-pll-utmip-supply: |
| description: UTMI PLL power supply. Must supply 1.8 V. |
| |
| avdd-pll-uerefe-supply: |
| description: PLLE reference PLL power supply. Must supply 1.05 V. |
| |
| dvdd-pex-pll-supply: |
| description: PCIe/USB3 PLL power supply. Must supply 1.05 V. |
| |
| hvdd-pex-pll-e-supply: |
| description: High-voltage PLLE power supply. Must supply 1.8 V. |
| |
| nvidia,pmc: |
| description: phandle to the Tegra Power Management Controller (PMC) node |
| $ref: /schemas/types.yaml#/definitions/phandle |
| |
| pads: |
| description: A required child node named "pads" contains a list of |
| subnodes, one for each of the pads exposed by the XUSB pad controller. |
| Each pad may need additional resources that can be referenced in its |
| pad node. |
| |
| The "status" property is used to enable or disable the use of a pad. |
| If set to "disabled", the pad will not be used on the given board. In |
| order to use the pad and any of its lanes, this property must be set |
| to "okay" or be absent. |
| type: object |
| additionalProperties: false |
| properties: |
| usb2: |
| type: object |
| additionalProperties: false |
| properties: |
| clocks: |
| items: |
| - description: USB2 tracking clock |
| |
| clock-names: |
| items: |
| - const: trk |
| |
| lanes: |
| type: object |
| additionalProperties: false |
| properties: |
| usb2-0: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb, uart ] |
| |
| usb2-1: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb, uart ] |
| |
| usb2-2: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb, uart ] |
| |
| usb2-3: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb, uart ] |
| |
| hsic: |
| type: object |
| additionalProperties: false |
| properties: |
| clocks: |
| items: |
| - description: HSIC tracking clock |
| |
| clock-names: |
| items: |
| - const: trk |
| |
| lanes: |
| type: object |
| additionalProperties: false |
| properties: |
| hsic-0: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb ] |
| |
| hsic-1: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ snps, xusb ] |
| |
| pcie: |
| type: object |
| additionalProperties: false |
| properties: |
| clocks: |
| items: |
| - description: PCIe PLL clock source |
| |
| clock-names: |
| items: |
| - const: pll |
| |
| resets: |
| items: |
| - description: PCIe PHY reset |
| |
| reset-names: |
| items: |
| - const: phy |
| |
| lanes: |
| type: object |
| additionalProperties: false |
| properties: |
| pcie-0: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-1: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-2: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-3: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-4: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-5: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| pcie-6: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ pcie-x1, usb3-ss, pcie-x4 ] |
| |
| sata: |
| type: object |
| additionalProperties: false |
| properties: |
| clocks: |
| items: |
| - description: SATA PLL clock source |
| |
| clock-names: |
| items: |
| - const: pll |
| |
| resets: |
| items: |
| - description: SATA PHY reset |
| |
| reset-names: |
| items: |
| - const: phy |
| |
| lanes: |
| type: object |
| additionalProperties: false |
| properties: |
| sata-0: |
| type: object |
| additionalProperties: false |
| properties: |
| "#phy-cells": |
| const: 0 |
| |
| nvidia,function: |
| description: Function selection for this lane. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ usb3-ss, sata ] |
| |
| ports: |
| description: A required child node named "ports" contains a list of |
| subnodes, one for each of the ports exposed by the XUSB pad controller. |
| Each port may need additional resources that can be referenced in its |
| port node. |
| |
| The "status" property is used to enable or disable the use of a port. |
| If set to "disabled", the port will not be used on the given board. In |
| order to use the port, this property must be set to "okay". |
| type: object |
| additionalProperties: false |
| properties: |
| usb2-0: |
| type: object |
| additionalProperties: false |
| properties: |
| # no need to further describe this because the connector will |
| # match on gpio-usb-b-connector or usb-b-connector and cause |
| # that binding to be selected for the subnode |
| connector: |
| type: object |
| |
| mode: |
| description: A string that determines the mode in which to |
| run the port. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ host, peripheral, otg ] |
| |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| usb-role-switch: |
| description: | |
| A boolean property whole presence indicates that the port |
| supports OTG or peripheral mode. If present, the port |
| supports switching between USB host and peripheral roles. |
| A connector must be added as a subnode in that case. |
| |
| See ../connector/usb-connector.yaml. |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| dependencies: |
| usb-role-switch: [ connector ] |
| |
| usb2-1: |
| type: object |
| additionalProperties: false |
| properties: |
| # no need to further describe this because the connector will |
| # match on gpio-usb-b-connector or usb-b-connector and cause |
| # that binding to be selected for the subnode |
| connector: |
| type: object |
| |
| mode: |
| description: A string that determines the mode in which to |
| run the port. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ host, peripheral, otg ] |
| |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| usb-role-switch: |
| description: | |
| A boolean property whole presence indicates that the port |
| supports OTG or peripheral mode. If present, the port |
| supports switching between USB host and peripheral roles. |
| A connector must be added as a subnode in that case. |
| |
| See ../connector/usb-connector.yaml. |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| dependencies: |
| usb-role-switch: [ connector ] |
| |
| usb2-2: |
| type: object |
| additionalProperties: false |
| properties: |
| # no need to further describe this because the connector will |
| # match on gpio-usb-b-connector or usb-b-connector and cause |
| # that binding to be selected for the subnode |
| connector: |
| type: object |
| |
| mode: |
| description: A string that determines the mode in which to |
| run the port. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ host, peripheral, otg ] |
| |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| usb-role-switch: |
| description: | |
| A boolean property whole presence indicates that the port |
| supports OTG or peripheral mode. If present, the port |
| supports switching between USB host and peripheral roles. |
| A connector must be added as a subnode in that case. |
| |
| See ../connector/usb-connector.yaml. |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| dependencies: |
| usb-role-switch: [ connector ] |
| |
| usb2-3: |
| type: object |
| additionalProperties: false |
| properties: |
| # no need to further describe this because the connector will |
| # match on gpio-usb-b-connector or usb-b-connector and cause |
| # that binding to be selected for the subnode |
| connector: |
| type: object |
| |
| mode: |
| description: A string that determines the mode in which to |
| run the port. |
| $ref: /schemas/types.yaml#/definitions/string |
| enum: [ host, peripheral, otg ] |
| |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| usb-role-switch: |
| description: | |
| A boolean property whole presence indicates that the port |
| supports OTG or peripheral mode. If present, the port |
| supports switching between USB host and peripheral roles. |
| A connector must be added as a subnode in that case. |
| |
| See ../connector/usb-connector.yaml. |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| dependencies: |
| usb-role-switch: [ connector ] |
| |
| hsic-0: |
| type: object |
| additionalProperties: false |
| properties: |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| hsic-1: |
| type: object |
| additionalProperties: false |
| properties: |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| usb3-0: |
| type: object |
| additionalProperties: false |
| properties: |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| nvidia,usb2-companion: |
| description: A single cell that specifies the physical port |
| number to map this super-speed USB port to. The range of |
| valid port numbers varies with the SoC generation. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [ 0, 1, 2, 3 ] |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| usb3-1: |
| type: object |
| additionalProperties: false |
| properties: |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| nvidia,usb2-companion: |
| description: A single cell that specifies the physical port |
| number to map this super-speed USB port to. The range of |
| valid port numbers varies with the SoC generation. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [ 0, 1, 2, 3 ] |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| usb3-2: |
| type: object |
| additionalProperties: false |
| properties: |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| nvidia,usb2-companion: |
| description: A single cell that specifies the physical port |
| number to map this super-speed USB port to. The range of |
| valid port numbers varies with the SoC generation. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [ 0, 1, 2, 3 ] |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| usb3-3: |
| type: object |
| additionalProperties: false |
| properties: |
| nvidia,internal: |
| description: A boolean property whose presence determines |
| that a port is internal. In the absence of this property |
| the port is considered to be external. |
| $ref: /schemas/types.yaml#/definitions/flag |
| |
| nvidia,usb2-companion: |
| description: A single cell that specifies the physical port |
| number to map this super-speed USB port to. The range of |
| valid port numbers varies with the SoC generation. |
| $ref: /schemas/types.yaml#/definitions/uint32 |
| enum: [ 0, 1, 2, 3 ] |
| |
| vbus-supply: |
| description: A phandle to the regulator supplying the VBUS |
| voltage. |
| |
| additionalProperties: false |
| |
| required: |
| - avdd-pll-utmip-supply |
| - avdd-pll-uerefe-supply |
| - dvdd-pex-pll-supply |
| - hvdd-pex-pll-e-supply |
| |
| examples: |
| - | |
| #include <dt-bindings/clock/tegra210-car.h> |
| #include <dt-bindings/gpio/tegra-gpio.h> |
| #include <dt-bindings/interrupt-controller/arm-gic.h> |
| |
| padctl@7009f000 { |
| compatible = "nvidia,tegra210-xusb-padctl"; |
| reg = <0x7009f000 0x1000>; |
| interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; |
| resets = <&tegra_car 142>; |
| reset-names = "padctl"; |
| |
| avdd-pll-utmip-supply = <&vdd_1v8>; |
| avdd-pll-uerefe-supply = <&vdd_pex_1v05>; |
| dvdd-pex-pll-supply = <&vdd_pex_1v05>; |
| hvdd-pex-pll-e-supply = <&vdd_1v8>; |
| |
| pads { |
| usb2 { |
| clocks = <&tegra_car TEGRA210_CLK_USB2_TRK>; |
| clock-names = "trk"; |
| |
| lanes { |
| usb2-0 { |
| nvidia,function = "xusb"; |
| #phy-cells = <0>; |
| }; |
| |
| usb2-1 { |
| nvidia,function = "xusb"; |
| #phy-cells = <0>; |
| }; |
| |
| usb2-2 { |
| nvidia,function = "xusb"; |
| #phy-cells = <0>; |
| }; |
| |
| usb2-3 { |
| nvidia,function = "xusb"; |
| #phy-cells = <0>; |
| }; |
| }; |
| }; |
| |
| hsic { |
| clocks = <&tegra_car TEGRA210_CLK_HSIC_TRK>; |
| clock-names = "trk"; |
| status = "disabled"; |
| |
| lanes { |
| hsic-0 { |
| status = "disabled"; |
| #phy-cells = <0>; |
| }; |
| |
| hsic-1 { |
| status = "disabled"; |
| #phy-cells = <0>; |
| }; |
| }; |
| }; |
| |
| pcie { |
| clocks = <&tegra_car TEGRA210_CLK_PLL_E>; |
| clock-names = "pll"; |
| resets = <&tegra_car 205>; |
| reset-names = "phy"; |
| |
| lanes { |
| pcie-0 { |
| nvidia,function = "pcie-x1"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-1 { |
| nvidia,function = "pcie-x4"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-2 { |
| nvidia,function = "pcie-x4"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-3 { |
| nvidia,function = "pcie-x4"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-4 { |
| nvidia,function = "pcie-x4"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-5 { |
| nvidia,function = "usb3-ss"; |
| #phy-cells = <0>; |
| }; |
| |
| pcie-6 { |
| nvidia,function = "usb3-ss"; |
| #phy-cells = <0>; |
| }; |
| }; |
| }; |
| |
| sata { |
| clocks = <&tegra_car TEGRA210_CLK_PLL_E>; |
| clock-names = "pll"; |
| resets = <&tegra_car 204>; |
| reset-names = "phy"; |
| |
| lanes { |
| sata-0 { |
| nvidia,function = "sata"; |
| #phy-cells = <0>; |
| }; |
| }; |
| }; |
| }; |
| |
| ports { |
| usb2-0 { |
| mode = "peripheral"; |
| usb-role-switch; |
| |
| connector { |
| compatible = "gpio-usb-b-connector", |
| "usb-b-connector"; |
| label = "micro-USB"; |
| type = "micro"; |
| vbus-gpios = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_LOW>; |
| }; |
| }; |
| |
| usb2-1 { |
| vbus-supply = <&vdd_5v0_rtl>; |
| mode = "host"; |
| }; |
| |
| usb2-2 { |
| vbus-supply = <&vdd_usb_vbus>; |
| mode = "host"; |
| }; |
| |
| usb2-3 { |
| mode = "host"; |
| }; |
| |
| hsic-0 { |
| status = "disabled"; |
| }; |
| |
| hsic-1 { |
| status = "disabled"; |
| }; |
| |
| usb3-0 { |
| nvidia,usb2-companion = <1>; |
| }; |
| |
| usb3-1 { |
| nvidia,usb2-companion = <2>; |
| }; |
| |
| usb3-2 { |
| status = "disabled"; |
| }; |
| |
| usb3-3 { |
| status = "disabled"; |
| }; |
| }; |
| }; |
