| Allwinner sun9i USB PHY | |
| ----------------------- | |
| Required properties: | |
| - compatible : should be one of | |
| * allwinner,sun9i-a80-usb-phy | |
| - reg : a list of offset + length pairs | |
| - #phy-cells : from the generic phy bindings, must be 0 | |
| - phy_type : "hsic" for HSIC usage; | |
| other values or absence of this property indicates normal USB | |
| - clocks : phandle + clock specifier for the phy clocks | |
| - clock-names : depending on the "phy_type" property, | |
| * "phy" for normal USB | |
| * "hsic_480M", "hsic_12M" for HSIC | |
| - resets : a list of phandle + reset specifier pairs | |
| - reset-names : depending on the "phy_type" property, | |
| * "phy" for normal USB | |
| * "hsic" for HSIC | |
| Optional Properties: | |
| - phy-supply : from the generic phy bindings, a phandle to a regulator that | |
| provides power to VBUS. | |
| It is recommended to list all clocks and resets available. | |
| The driver will only use those matching the phy_type. | |
| Example: | |
| usbphy1: phy@00a01800 { | |
| compatible = "allwinner,sun9i-a80-usb-phy"; | |
| reg = <0x00a01800 0x4>; | |
| clocks = <&usb_phy_clk 2>, <&usb_phy_clk 10>, | |
| <&usb_phy_clk 3>; | |
| clock-names = "hsic_480M", "hsic_12M", "phy"; | |
| resets = <&usb_phy_clk 18>, <&usb_phy_clk 19>; | |
| reset-names = "hsic", "phy"; | |
| #phy-cells = <0>; | |
| }; |