# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/ti,cal.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL) Device Tree Bindings

maintainers:
  - Benoit Parrot <bparrot@ti.com>

description: |-
  The Camera Adaptation Layer (CAL) is a key component for image capture
  applications. The capture module provides the system interface and the
  processing capability to connect CSI2 image-sensor modules to the
  DRA72x device.

  CAL supports 2 camera port nodes on MIPI bus.

properties:
  compatible:
    enum:
      # for DRA72 controllers
      - ti,dra72-cal
      # for DRA72 controllers pre ES2.0
      - ti,dra72-pre-es2-cal
      # for DRA76 controllers
      - ti,dra76-cal
      # for AM654 controllers
      - ti,am654-cal

  reg:
    minItems: 2
    items:
      - description: The CAL main register region
      - description: The RX Core0 (DPHY0) register region
      - description: The RX Core1 (DPHY1) register region

  reg-names:
    minItems: 2
    items:
      - const: cal_top
      - const: cal_rx_core0
      - const: cal_rx_core1

  interrupts:
    maxItems: 1

  ti,camerrx-control:
    $ref: "/schemas/types.yaml#/definitions/phandle-array"
    items:
      - items:
          - description: phandle to device control module
          - description: offset to the control_camerarx_core register
    description:
      phandle to the device control module and offset to the
      control_camerarx_core register

  clocks:
    maxItems: 1

  clock-names:
    const: fck

  power-domains:
    description:
      List of phandle and PM domain specifier as documented in
      Documentation/devicetree/bindings/power/power_domain.txt
    maxItems: 1

  ports:
    $ref: /schemas/graph.yaml#/properties/ports

    properties:
      port@0:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: CSI2 Port #0

        properties:
          endpoint:
            $ref: video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              clock-lanes:
                maxItems: 1

              data-lanes:
                minItems: 1
                maxItems: 4

      port@1:
        $ref: /schemas/graph.yaml#/$defs/port-base
        unevaluatedProperties: false
        description: CSI2 Port #1

        properties:
          endpoint:
            $ref: video-interfaces.yaml#
            unevaluatedProperties: false

            properties:
              clock-lanes:
                maxItems: 1

              data-lanes:
                minItems: 1
                maxItems: 4

    required:
      - port@0

required:
  - compatible
  - reg
  - reg-names
  - interrupts
  - ti,camerrx-control

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    cal: cal@4845b000 {
        compatible = "ti,dra72-cal";
        reg = <0x4845B000 0x400>,
              <0x4845B800 0x40>,
              <0x4845B900 0x40>;
        reg-names = "cal_top",
                    "cal_rx_core0",
                    "cal_rx_core1";
        interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
        ti,camerrx-control = <&scm_conf 0xE94>;

        ports {
              #address-cells = <1>;
              #size-cells = <0>;

              csi2_0: port@0 {
                    reg = <0>;
                    csi2_phy0: endpoint {
                           remote-endpoint = <&csi2_cam0>;
                           clock-lanes = <0>;
                           data-lanes = <1 2>;
                    };
              };
        };
    };

    i2c {
        clock-frequency = <400000>;
        #address-cells = <1>;
        #size-cells = <0>;

        camera-sensor@3c {
               compatible = "ovti,ov5640";
               reg = <0x3c>;
               AVDD-supply = <&reg_2p8v>;
               DOVDD-supply = <&reg_1p8v>;
               DVDD-supply = <&reg_1p5v>;
               clocks = <&clk_ov5640_fixed>;
               clock-names = "xclk";

               port {
                    csi2_cam0: endpoint {
                            remote-endpoint = <&csi2_phy0>;
                            clock-lanes = <0>;
                            data-lanes = <1 2>;
                    };
               };
        };
    };

...