# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/dma/apple,admac.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Apple Audio DMA Controller (ADMAC)

description: |
  Apple's Audio DMA Controller (ADMAC) is used to fetch and store audio samples
  on SoCs from the "Apple Silicon" family.

  The controller has been seen with up to 24 channels. Even-numbered channels
  are TX-only, odd-numbered are RX-only. Individual channels are coupled to
  fixed device endpoints.

maintainers:
  - Martin Povišer <povik+lin@cutebit.org>

allOf:
  - $ref: "dma-controller.yaml#"

properties:
  compatible:
    items:
      - enum:
          - apple,t6000-admac
          - apple,t8103-admac
      - const: apple,admac

  reg:
    maxItems: 1

  '#dma-cells':
    const: 1
    description:
      Clients specify a single cell with channel number.

  dma-channels:
    maximum: 24

  interrupts:
    minItems: 4
    maxItems: 4
    description:
      Interrupts that correspond to the 4 IRQ outputs of the controller. Usually
      only one of the controller outputs will be connected as an usable interrupt
      source. The remaining interrupts will be left without a valid value, e.g.
      in an interrupts-extended list the disconnected positions will contain
      an empty phandle reference <0>.

required:
  - compatible
  - reg
  - '#dma-cells'
  - dma-channels
  - interrupts

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/apple-aic.h>
    #include <dt-bindings/interrupt-controller/irq.h>

    aic: interrupt-controller {
      interrupt-controller;
      #interrupt-cells = <3>;
    };

    admac: dma-controller@238200000 {
      compatible = "apple,t8103-admac", "apple,admac";
      reg = <0x38200000 0x34000>;
      dma-channels = <24>;
      interrupts-extended = <0>,
                            <&aic AIC_IRQ 626 IRQ_TYPE_LEVEL_HIGH>,
                            <0>,
                            <0>;
      #dma-cells = <1>;
    };