// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2018 MediaTek Inc.
// Author: Weiyi Lu <weiyi.lu@mediatek.com>

#include <linux/module.h>
#include "clkchk.h"

static const char * const off_pll_names[] = {
	"univ2pll",
	"msdcpll",
	"mmpll",
	"mfgpll",
	"tvdpll",
	"apll1",
	"apll2",
	NULL
};

static const char * const all_clk_names[] = {
	"univ2pll",
	"msdcpll",
	"mmpll",
	"mfgpll",
	"tvdpll",
	"apll1",
	"apll2",
	"apmixed_ssusb26m",
	"apmixed_mipic026m",
	"apmixed_mdpll26m",
	"apmixed_mmsys26m",
	"apmixed_ufs26m",
	"apmixed_mipic126m",
	"apmixed_mempll26m",
	"apmixed_lvpll26m",
	"apmixed_mipid026m",
	"apmixed_mipid126m",
	"syspll_d3",
	"syspll_d5",
	"syspll_d2_d2",
	"syspll_d2_d4",
	"syspll_d2_d16",
	"syspll_d3_d2",
	"syspll_d3_d4",
	"syspll_d3_d8",
	"syspll_d5_d2",
	"syspll_d5_d4",
	"syspll_d7_d2",
	"syspll_d7_d4",
	"univpll_ck",
	"univpll_d2",
	"univpll_d3",
	"univpll_d5",
	"univpll_d7",
	"univpll_d2_d2",
	"univpll_d2_d4",
	"univpll_d2_d8",
	"univpll_d3_d2",
	"univpll_d3_d4",
	"univpll_d3_d8",
	"univpll_d5_d2",
	"univpll_d5_d4",
	"univpll_d5_d8",
	"apll1_ck",
	"apll1_d2",
	"apll1_d4",
	"apll1_d8",
	"apll2_ck",
	"apll2_d2",
	"apll2_d4",
	"apll2_d8",
	"tvdpll_ck",
	"tvdpll_d2",
	"tvdpll_d4",
	"tvdpll_d8",
	"tvdpll_d16",
	"msdcpll_ck",
	"msdcpll_d2",
	"msdcpll_d4",
	"msdcpll_d8",
	"msdcpll_d16",
	"ad_osc_ck",
	"osc_d2",
	"osc_d4",
	"osc_d8",
	"osc_d16",
	"csw_f26m_ck_d2",
	"mfgpll_ck",
	"univ_192m_ck",
	"univ_192m_d2",
	"univ_192m_d4",
	"univ_192m_d8",
	"univ_192m_d16",
	"univ_192m_d32",
	"mmpll_ck",
	"mmpll_d4",
	"mmpll_d4_d2",
	"mmpll_d4_d4",
	"mmpll_d5",
	"mmpll_d5_d2",
	"mmpll_d5_d4",
	"mmpll_d6",
	"mmpll_d7",
	"osc",
	"univpll_192m",
	"apll_i2s0_sel",
	"apll_i2s1_sel",
	"apll_i2s2_sel",
	"apll_i2s3_sel",
	"apll_i2s4_sel",
	"apll_i2s5_sel",
	"apll12_div0",
	"apll12_div1",
	"apll12_div2",
	"apll12_div3",
	"apll12_div4",
	"apll12_divb",
	"univpll",
	"armpll_div_pll2",
	"mm_sel",
	"cam_sel",
	"mfg_sel",
	"camtg_sel",
	"spi_sel",
	"msdc50_hclk_sel",
	"msdc50_0_sel",
	"msdc30_1_sel",
	"msdc30_2_sel",
	"audio_sel",
	"aud_intbus_sel",
	"fpwrap_ulposc_sel",
	"scp_sel",
	"atb_sel",
	"sspm_sel",
	"dpi0_sel",
	"scam_sel",
	"aud_1_sel",
	"aud_2_sel",
	"disppwm_sel",
	"ssusb_top_xhci_sel",
	"usb_top_sel",
	"i2c_sel",
	"f52m_mfg_sel",
	"seninf_sel",
	"dxcc_sel",
	"camtg2_sel",
	"aud_eng1_sel",
	"aud_eng2_sel",
	"faes_ufsfde_sel",
	"fufs_sel",
	"img_sel",
	"dsp_sel",
	"dsp1_sel",
	"dsp2_sel",
	"ipu_if_sel",
	"camtg3_sel",
	"camtg4_sel",
	"mcu_mp0_sel",
	"mcu_mp2_sel",
	"mcu_bus_sel",
	"infra_pmic_tmr",
	"infra_pmic_md",
	"infra_pmic_conn",
	"infra_scp",
	"infra_sej",
	"infra_apxgpt",
	"infra_icusb",
	"infra_gce",
	"infra_therm",
	"infra_i2c0",
	"infra_i2c1",
	"infra_i2c2",
	"infra_i2c3",
	"infra_pwm_hclk",
	"infra_pwm1",
	"infra_pwm2",
	"infra_pwm3",
	"infra_pwm4",
	"infra_pwm",
	"infra_uart1",
	"infra_uart2",
	"infra_uart3",
	"infra_gce_26m",
	"infra_cqdma_fpc",
	"infra_btif",
	"infra_spi0",
	"infra_msdc0",
	"infra_msdc1",
	"infra_msdc2",
	"infra_msdc0_sck",
	"infra_dvfsrc",
	"infra_gcpu",
	"infra_trng",
	"infra_auxadc",
	"infra_cpum",
	"infra_ccif1_ap",
	"infra_ccif1_md",
	"infra_auxadc_md",
	"infra_msdc1_sck",
	"infra_msdc2_sck",
	"infra_apdma",
	"infra_xiu",
	"infra_device_apc",
	"infra_ccif_ap",
	"infra_debugsys",
	"infra_audio",
	"infra_ccif_md",
	"infra_dxcc_sec_core",
	"infra_dxcc_ao",
	"infra_dramc_f26m",
	"infra_irtx",
	"infra_disppwm",
	"infra_cldma_bclk",
	"infra_audio_26m_bclk",
	"infra_spi1",
	"infra_i2c4",
	"infra_md_tmp_share",
	"infra_spi2",
	"infra_spi3",
	"infra_unipro_sck",
	"infra_unipro_tick",
	"infra_ufs_mp_sap_bck",
	"infra_md32_bclk",
	"infra_sspm",
	"infra_unipro_mbist",
	"infra_sspm_bus_hclk",
	"infra_i2c5",
	"infra_i2c5_arbiter",
	"infra_i2c5_imm",
	"infra_i2c1_arbiter",
	"infra_i2c1_imm",
	"infra_i2c2_arbiter",
	"infra_i2c2_imm",
	"infra_spi4",
	"infra_spi5",
	"infra_cqdma",
	"infra_ufs",
	"infra_aes_ufsfde",
	"infra_ufs_tick",
	"infra_msdc0_self",
	"infra_msdc1_self",
	"infra_msdc2_self",
	"infra_sspm_26m_self",
	"infra_sspm_32k_self",
	"infra_ufs_axi",
	"infra_i2c6",
	"infra_ap_msdc0",
	"infra_md_msdc0",
	"infra_usb",
	"infra_devmpu_bclk",
	"infra_ccif2_ap",
	"infra_ccif2_md",
	"infra_ccif3_ap",
	"infra_ccif3_md",
	"infra_sej_f13m",
	"infra_aes_bclk",
	"infra_i2c7",
	"infra_i2c8",
	"infra_fbist2fpc",
	"aud_tml",
	"aud_dac_predis",
	"aud_dac",
	"aud_adc",
	"aud_apll_tuner",
	"aud_apll2_tuner",
	"aud_24m",
	"aud_22m",
	"aud_afe",
	"aud_i2s4",
	"aud_i2s3",
	"aud_i2s2",
	"aud_i2s1",
	"aud_pdn_adda6_adc",
	"aud_tdm",
	"mfg_bg3d",
	"mm_smi_common",
	"mm_smi_larb0",
	"mm_smi_larb1",
	"mm_gals_comm0",
	"mm_gals_comm1",
	"mm_gals_ccu2mm",
	"mm_gals_ipu12mm",
	"mm_gals_img2mm",
	"mm_gals_cam2mm",
	"mm_gals_ipu2mm",
	"mm_mdp_dl_txck",
	"mm_ipu_dl_txck",
	"mm_mdp_rdma0",
	"mm_mdp_rdma1",
	"mm_mdp_rsz0",
	"mm_mdp_rsz1",
	"mm_mdp_tdshp",
	"mm_mdp_wrot0",
	"mm_fake_eng",
	"mm_disp_ovl0",
	"mm_disp_ovl0_2l",
	"mm_disp_ovl1_2l",
	"mm_disp_rdma0",
	"mm_disp_rdma1",
	"mm_disp_wdma0",
	"mm_disp_color0",
	"mm_disp_ccorr0",
	"mm_disp_aal0",
	"mm_disp_gamma0",
	"mm_disp_dither0",
	"mm_disp_split",
	"mm_dsi0_mm",
	"mm_dsi0_if",
	"mm_dpi_mm",
	"mm_dpi_if",
	"mm_fake_eng2",
	"mm_mdp_dl_rx",
	"mm_ipu_dl_rx",
	"mm_26m",
	"mm_mmsys_r2y",
	"mm_disp_rsz",
	"mm_mdp_wdma0",
	"mm_mdp_aal",
	"mm_mdp_ccorr",
	"mm_dbi_mm",
	"mm_dbi_if",
	"vdec_vdec",
	"vdec_larb1",
	"venc_larb",
	"venc_venc",
	"venc_jpgenc",
	"img_owe",
	"img_wpe_b",
	"img_wpe_a",
	"img_mfb",
	"img_rsc",
	"img_dpe",
	"img_fdvt",
	"img_dip",
	"img_larb2",
	"img_larb5",
	"cam_larb6",
	"cam_dfp_vad",
	"cam_cam",
	"cam_camtg",
	"cam_seninf",
	"cam_camsv0",
	"cam_camsv1",
	"cam_camsv2",
	"cam_ccu",
	"cam_larb3",
	"ipu_conn_ipu",
	"ipu_conn_ahb",
	"ipu_conn_axi",
	"ipu_conn_isp",
	"ipu_conn_cam_adl",
	"ipu_conn_img_adl",
	"ipu_conn_dap_rx",
	"ipu_conn_apb2axi",
	"ipu_conn_apb2ahb",
	"ipu_conn_ipu_cab1to2",
	"ipu_conn_ipu1_cab1to2",
	"ipu_conn_ipu2_cab1to2",
	"ipu_conn_cab3to3",
	"ipu_conn_cab2to1",
	"ipu_conn_cab3to1_slice",
	"ipu_adl_cabgen",
	"ipu_core0_jtag",
	"ipu_core0_axi",
	"ipu_core0_ipu",
	"ipu_core1_jtag",
	"ipu_core1_axi",
	"ipu_core1_ipu",
	/* end */
	NULL
};

static const char * const compatible[] = {"mediatek,mt8183", NULL};

static struct clkchk_cfg_t cfg = {
	.aee_excp_on_fail = false,
	.warn_on_fail = true,
	.compatible = compatible,
	.off_pll_names = off_pll_names,
	.all_clk_names = all_clk_names,
};

static int __init clkchk_platform_init(void)
{
	return clkchk_init(&cfg);
}
subsys_initcall(clkchk_platform_init);