)]}'
{
  "commit": "d4ffc4896b3e709c6a5d7e5a78a1fddfc774fa25",
  "tree": "0a7acdb0ec1cebed0030246b8b7c88b0abb683f8",
  "parents": [
    "3aac49b236c137fa77b97968d25338a28c49f0f8"
  ],
  "author": {
    "name": "Zhi Wang",
    "email": "zhiw@nvidia.com",
    "time": "Sun Sep 06 09:04:04 2026 +0300"
  },
  "committer": {
    "name": "Danilo Krummrich",
    "email": "dakr@kernel.org",
    "time": "Tue Oct 13 01:12:58 2026 +0200"
  },
  "message": "rust: pci: add extended capability and SR-IOV support\n\nRust PCI drivers have no typed interface for locating and accessing PCIe\nextended capabilities.\n\nThe SR-IOV extended capability describes VF topology and VF BARs. Expose\nthis information through the Rust PCI abstraction so drivers can use the\nexisting typed configuration-space accessors instead of raw bindings.\n\nDefine ExtCapability to associate a capability ID with a register layout,\nand add ConfigSpace::find_ext_capability() to locate and project that\nlayout. Bound the view at the next capability or the end of extended\nconfiguration space. Add ExtSriovRegs and a decoded VF BAR iterator that\nreads and validates all six VF BAR register slots up front, yields decoded\nBAR addresses and widths in logical order, and keeps the raw\nconfiguration-space slot advancement internal. Since PCI_EXT_CAP_NEXT() is\na function-like macro, expose it through a Rust helper.\n\nKeep raw SR-IOV registers private because PCI core owns their state. Expose\nthe current First VF Offset through a read-only accessor because the Nova\nGSP ABI needs the raw 16-bit First VF Offset in Routing ID space. The\npci_iov_virtfn_devfn() helper instead returns the low eight bits of a\ncalculated VF Routing ID.\n\nCc: Alexandre Courbot \u003cacourbot@nvidia.com\u003e\nCc: Gary Guo \u003cgary@garyguo.net\u003e\nCc: Ilpo Järvinen \u003cilpo.jarvinen@linux.intel.com\u003e\nReviewed-by: Alexandre Courbot \u003cacourbot@nvidia.com\u003e\nSigned-off-by: Zhi Wang \u003czhiw@nvidia.com\u003e\nLink: https://patch.msgid.link/20260906060404.3336193-2-zhiw@nvidia.com\nSigned-off-by: Danilo Krummrich \u003cdakr@kernel.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "a714cc2bfb7ab23cbd095a5dcedafeca9f84e47c",
      "old_mode": 33188,
      "old_path": "rust/helpers/pci.c",
      "new_id": "502f56e02fcc484c97b65102af35e528bf982006",
      "new_mode": 33188,
      "new_path": "rust/helpers/pci.c"
    },
    {
      "type": "modify",
      "old_id": "3ec897709e890ca6a69c2d0d2e985658d72837a6",
      "old_mode": 33188,
      "old_path": "rust/kernel/pci.rs",
      "new_id": "77c52fe59551170930d12fe0d20cf60f59d95632",
      "new_mode": 33188,
      "new_path": "rust/kernel/pci.rs"
    },
    {
      "type": "add",
      "old_id": "0000000000000000000000000000000000000000",
      "old_mode": 0,
      "old_path": "/dev/null",
      "new_id": "62f263ada1b3ce79e37b976931f805d2f745455b",
      "new_mode": 33188,
      "new_path": "rust/kernel/pci/cap.rs"
    }
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}